Michael Lerman

Engineer with Ideas

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Objective

  • This profile is about a motivated engineer looking for a challenging role.
  • I have been working many years in the semiconductor-ASIC-PC industry as a hardsoft engineer and manager.
  • I am now interested in a role of responsibilities in the web, networking, or mobile technologies.

Contact Info

  • Michael LERMAN
  • 2462 Booksin Ave
    San Jose, CA 95125 - USA (map)
  • Phone: 1 408 978 2232
  • Cell: 1 408 564 9578
  • Email: michael_lerman@yahoo.com

Skills (1)

Software development and hardware bring up

  • x86 PC chipset system architecture
  • From the lowest level firmware and driver to the highest level Web UI
  • UEFI x64 Shell application, Driver and BIOS (Intel Tianocore)
  • Embedded firmware development : 8051 with Keil, Freescale Codewarrior
  • Scripting with various languages: Perl, Batch, Php
  • C/C++/C# Visual Studio
  • Windows and LINUX

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Skills (2)

Web and Network development

  • Frontend HTML, CSS, Javascript
  • Backend server side native CGI, PHP
  • Databases: MySQL, SQlite, MSAccess
  • JAVA applet with JNI
  • Socket network programming
  • WAMP site Administration
  • Payment gateway and shopping Cart
  • PDF with TCPDF PDFTK
  • Imaging with ImageMagick
  • Data parsing, BNF, XML, XSLT, RegEx

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Skills (3)

Expertise

  • JTAG, SPI
  • Test automation
  • Debug tools
  • Web UI UX

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Professional background

  • 2013 - now : Micron
  • 2000 - 2013 : Manager @ AMD / ATI
  • 1994 - 2000 : Manager @ STMICROELECTRONICS
  • 1990 - 1994 : Design Engineer @ NORMEREL

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Professional backgrounds (1)

2013 - now : Micron

  • Senior System Engineer - Embedded
  • Enablement, Application and Validation
  • Freescale Freedom, Intel MinnowBoard Tianocore
  • UEFI BIOS and Drivers
  • NOR SPI

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Professional backgrounds (2)

2000 - 2013 : Manager @ AMD / ATI

  • Manager, System Engineering
Designed and developed an innovative architecture enabling Post Silicon Automatic Verification in order to decrease the silicon bring up time. Architected and performed the Design Verification of the ATI Radeon IGP 320 North-Bridge debug features: JTAG and Debug bus. Managed the Design of laptop and Desktop PC motherboards. Responsible of the lab and the equipments.
  • Staff Engineer (MTS), Debug tools
Software Design for Hardware Debug Tools. Develop debug tools for CPU Graphics North Bridge and South Bridge on Windows and Linux.

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Professional backgrounds (3)

1994 - 2000 : Manager @ STMICROELECTRONICS

  • Manager, System Solution
Managed a multi-disciplinary team. Developed hardware and software for a single chip PC & DVD device. Prototyping with FPGA. DVD Playback, decryption, audio, Graphics. Lab setup, equipment purchase.
    • Application manager
    providing technical support to key customers. Cost Center manager. Was a key contributor in establishing an International Strategic Alliance which led to the creation of a new business in the company.

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Professional backgrounds (4)

1990 - 1994 : Design Engineer @ NORMEREL

  • Design Engineer
Design of desktop PC motherboards. Digital electronic systems, microcomputer PC, memory, all the range of Intel microprocessors, video, multimedia, bus ISA, EISA, VL VESA, PCI, Ethernet, SCSI

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Patents and Awards

  • SLEEP PROCESSOR : 20090313492
  • AUTO-SLEEP ARRAY : 20100058089 MEMORY DEVICE HAVING A MEMORY SLEEP LOGIC AND METHODS THEREFORE.
  • EASY FLASH : 20100146159 MEMORY FLASH APPARATUS AND METHOD FOR PROVIDING DEVICE UPGRADES OVER A STANDARD INTERFACE.
  • NETMORY

Spotlight Award

  • Spotlight Award on Aug 2010 for the outstanding contribution to the SB900 Bring up effort through the development of Register Explorer.

Web Presence

Languages

  • French
  • English
  • Hebrew
  • Arabic


Other

  • US and EU citizen
  • Licensed by the Californian Department of Real Estate

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