Objective

This document is at CheckThisResume.com

This profile is about a motivated entrepreneurial engineer looking for the next challenging role. Tell me about your project, I am ready to take risks and invest my time and effort. I have been working many years in the semiconductor-ASIC-PC industry as a hardsoft engineer. I am now interested in the web or the mobile technologies with a preference for the open-source environment.

If you are looking for my experience in the web please follow this link: http://checkthisresume.com/efolio

Contact

Michael LERMAN
2462 Booksin Ave
San Jose, CA 95125 - USA (map)
Phone: 1 408 978 2232
Cell: 1 408 564 9578
Email: michael_lerman@yahoo.com

Skills

Software development and hardware bring up

x86 PC chipset system architecture
From the lowest level firmware and driver to the highest level Web UI
UEFI x64 Shell application
Embedded firmware development for 8051 with Keil
Scripting with various languages: Perl, Batch, Php
C/C++/C# Visual Studio
Windows and LINUX

Web and Network development (showcase)

Frontend HTML, CSS, Javascript
Backend server side native CGI, PHP
Databases: MySQL, SQlite, MSAccess.
JAVA applet with JNI
Socket network programming
WAMP site Administration
Payment gateway and shopping Cart
PDF with TCPDF PDFTK
Imaging with ImageMagick
Data parsing, BNF, XML, XSLT, RegEx

Specialities

JTAG
Test automation
Debug tools
Web UI UX

Professional background

Dec 2012 - Present: Inphi

Inphi - Santa Clara - Staff Engineer - Validation Tools. UEFI application and BIOS.

2000 - 2012: AMD Advanced Micro Devices and ATI

AMD - Sunnyvale - Staff Engineer - (Since Oct 2011) Software Design for Hardware Debug Tools. Develop debug tools for CPU Graphics North Bridge and South Bridge on Windows and Linux.
Senior Engineer - (4 years) Web development: Design of Debug and diagnostic tools web applications. Developed front end and back end programs. Created a light localhost web server. Used a wide range of technologies: HTML, CSS, DOM, PHP and fast native CGI in C/C++, Javascript, Java applet with JNI, CMS, AJAX etc. Built hardware and software JTAG tools.
ATI Research Silicon Valley Santa Clara - Senior Engineer - (5 years) Hardware Bring up of PC platforms, worked on HD-audio, AC97, ACPI, APIC, Ethernet, IDE, SATA, PCI bridge. Wrote diagnostic programs, debug scripts and setup hardware test benches. Identified ASIC flaws, verified bug fixes.
Manager, System Engineering - (1 year) group of 10 engineers and technicians.
Designed and developed an innovative architecture enabling Post Silicon Automatic Verification in order to decrease the silicon bring up time. Architected and performed the Design Verification of the ATI Radeon IGP 320 North-Bridge debug features: JTAG and Debug bus. Managed the Design of laptop and Desktop PC motherboards. Responsible of the lab and the equipments.

1994 - 2000: STMICROELECTRONICS

STMicroelectronics - 1997-2000 - San Jose
Manager, System Solution - (3 years) a group of 4 to 6 engineers.
Managed a multi-disciplinary team. Developed hardware and software for a single chip PC & DVD device. Prototyping with FPGA. DVD Playback, decryption, audio, Graphics. Lab setup, equipment purchase and team hiring.
Application manager, providing technical support to key customers.
Cost Center manager.
Was a key contributor in establishing an International Strategic Alliance which led to the creation of a new business in the company.

STMicroelectronics - 1994-1997 - France
Application engineer - (3 years) Support to the CPU business and core logic in Europe, (ST486, 5x86, 6x86) Realization of debug, test, evaluation and demonstration boards. x86 CPU, AT core logic, video MPEG1/2. Customer technical support. Development: solutions & applications for selected customers. Communication: manuals, application notes evaluation kits, presentations, customer visits. Training for sales. Launch of the System on chip program.
Achievements:
- PRIMA. Design of the set-top box Motherboard with MPEG2 playback capability, Video CD player.
- Design of the STPC bring-up and evaluation boards.
- Development of silicon debug software for: CPU, Graphic Engine, PC core logic, PCI and ISA bus, local bus IDE, video port and TV output.

1990 - 1994: NORMEREL

ADDX-NORMEREL, BUC-France
Hardware Design Engineer - (4 years)
Project leader. Design of desktop PC motherboards. Digital electronic systems, microcomputer PC, memory, all the range of Intel microprocessors, video, multimedia, bus ISA, EISA, VL VESA, PCI, Ethernet, SCSI, C language programming, assembler, drivers, PAL, EPLD etc.
Achievements:
- XENON: i486 workstation and server PC AT with the VESA bus, production made in March 1992.
- ZEPHYR: i486 PCI workstation , low consumption and high performance, production made in April 1994.

Patents and Awards

Patents

SLEEP PROCESSOR: 20090313492
AUTO-SLEEP ARRAY: 20100058089
MEMORY DEVICE HAVING A MEMORY SLEEP LOGIC AND METHODS THEREFORE.
EASY FLASH: 20100146159
MEMORY FLASH APPARATUS AND METHOD FOR PROVIDING DEVICE UPGRADES OVER A STANDARD INTERFACE.
SPEED DEBUG (Pending)

Awards

Spotlight Award on Aug 2010 for the outstanding contribution to the SB900 Bring up effort through the development of Register Explorer.

Languages

French
English
Hebrew
Arabic

Web presence

Other

US and EU citizen.
Holds a work permit in approximately 30 countries.
Licensed by the Californian Department of Real Estate.
Excellent Credit History and Score.

Resume in PDF and other formats

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